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tc74ac161,163p/f/ft 2012-02-29 1 toshiba cmos digital integrat ed ci rcuit silicon monolithic tc74ac161p,tc74ac161f,tc74ac161ft tc74ac163p,tc74ac163f,tc74ac163ft synchronous presettable 4-bit binary counter tc74ac161p/f/ft asynchronous clear tc74ac163p/f/ft synchronous clear the tc74ac161 and 163 are advanced high speed cmos synchronous presettable counters fabricated with silicon gate and double-layer metal wiring c 2 mos technology. they achieve the high speed op eration similar to equivalent bipolar schottky ttl while main taining the cmos low power dissipation. the ck input is active on the rising edge. both load and clr inputs are active on low logic level. presetting of these ic?s is synchr onous to the rising edge of ck. the clear function of the tc74a c163 is synchronous to ck, while the tc74ac161 are cleared asynchronously. two enable inputs (enp and ent) and carry output are provided to enable easy cascadin g of counters, which facilitates easy implementation of n-bit counters without using external gates. all inputs are equipped with prot ection circuits against static discharge or transi ent excess voltage. features ? high speed: f max = 170 mhz (typ.) at v cc = 5 v ? low power dissipation: i cc = 8 a (max) at ta = 25c ? high noise immunity: v nih = v nil = 28% v cc (min) ? symmetrical output impedance: |i oh | = i ol = 24 ma (min) capability of driving 50 ? transmission lines. ? balanced propagation delays: t plh ? t phl ? wide operating voltage range: v cc (opr) = 2 to 5.5 v ? pin and function compatible with 74f161/163 tc74ac161p, tc74ac163p tc74ac161f, tc74ac163f tc74ac161ft, tc74ac163ft weight dip16-p-300-2.54a : 1.00 g (typ.) sop16-p-300-1.27a : 0.18 g (typ.) tssop16-p-0044-0.65a : 0.06 g (typ.)
tc74ac161,163p/f/ft 2012-02-29 2 pin assignment iec logic symbol truth table (note) inputs outputs clr (161) clr (163) load enp ent ck (161) ck (163) qa qb qc qd function l l x x x x l l l l reset to ?0? h h l x x a b c d preset data h h h x l no change no count h h h l x no change no count h h h h h count up count h x x x x no change no count note: x: don?t care a, b, c, d: logic level of data inputs carry: carry = entqaqbqcqd v cc 16 carry output qa qb 15 14 13 12 11 10 clr 1 2 3 4 5 6 7 b c d enp gnd qc 8 load 9 qd ent (top view) ck a (9) (1) (10) (2) (7) enp 1, 5d (1) ck (3) (4) b a (15) (14) qb (13) qa qc ct = 0 m1 load clr c (5) (6) d (12) qd (11) carry output ent tc74ac161 ctrdiv 16 m2 g3 g4 c5/2, 3, 4+ 3ct = 15 (2) (4) (8) (9) (1) (10) (2) (7) enp 1, 5d (1) ck (3) (4) b a (15) (14) qb (13) qa qc 5ct = 0 m1 load clr c (5) (6) d (12) qd (11) carry output ent tc74ac163 ctrdiv 16 m2 g3 g4 c5/2, 3, 4+ 3ct = 15 (2) (4) (8)
tc74ac161,163p/f/ft 2012-02-29 3 timing chart count inhibit 12 async clear (161) sync clear (163) preset 13 14 15 0 1 2 carry output qd qc qb qa ent enp ck d c b a load clr data inputs outputs don?t care until load goes low
tc74ac161,163p/f/ft 2012-02-29 4 system diagram note: truth table of internal f/f tc74ac161 tc74ac163 d ck r q q d ck r q q x x h l h x h l h l l l h l l l h h l h l h l h l x l no change x l no change x: don?t care clr ent 1 10 enp load 7 9 e e l 15 carry out 14 qa e e l (note 2) l a 3 r qd q ck 13 qb e l (note 2) l b 4 r qd q ck e 12 qc e l (note 2) l c 5 r qd q ck e 11 qd e (note 2) l d r qd q ck 6 ck 2 l l e (note) (note) (note) (note)
tc74ac161,163p/f/ft 2012-02-29 5 absolute maximum ratings (note 1) characteristics symbol rating unit supply voltage range v cc ? 0.5 to 7.0 v dc input voltage v in ? 0.5 to v cc + 0.5 v dc output voltage v out ? 0.5 to v cc + 0.5 v input diode current i ik 20 ma output diode current i ok 50 ma dc output current i out 50 ma dc v cc /ground current i cc 125 ma power dissipation p d 500 (dip) (note 2)/180 (sop/tssop) mw storage temperature t stg ? 65 to 150 c note 1: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the app lication of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temper ature/current/voltage, etc. ) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/derating concept and methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 2: 500 mw in the range of ta = ? 40 to 65c. from ta = 65 to 85c a derating factor of ? 10 mw/c should be applied up to 300 mw. operating ranges (note) characteristics symbol rating unit supply voltage v cc 2.0 to 5.5 v input voltage v in 0 to v cc v output voltage v out 0 to v cc v operating temperature t opr ? 40 to 85 c input rise and fall time dt/dv 0 to 100 (v cc = 3.3 0.3 v) 0 to 20 (v cc = 5 0.5 v) ns/v note: the operating ranges must be maintained to ensure the normal oper ation of the device. unused inputs must be tied to either vcc or gnd.
tc74ac161,163p/f/ft 2012-02-29 6 electrical characteristics dc characteristics ta = 25c ta = ? 40 to 85c characteristics symbol test condition v cc (v) min typ. max min max unit high-level input voltage v ih D 2.0 3.0 5.5 1.50 2.10 3.85 D D D D D D 1.50 2.10 3.85 D D D v low-level input voltage v il D 2.0 3.0 5.5 D D D D D D 0.50 0.90 1.65 D D D 0.50 0.90 1.65 v i oh = ? 50 a 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 D D D 1.9 2.9 4.4 D D D high-level output voltage v oh v in = v ih or v il i oh = ? 4 ma i oh = ? 24 ma i oh = ? 75 ma (note) 3.0 4.5 5.5 2.58 3.94 D D D D D D D 2.48 3.80 3.85 D D D v i ol = 50 a 2.0 3.0 4.5 D D D 0.0 0.0 0.0 0.1 0.1 0.1 D D D 0.1 0.1 0.1 low-level output voltage v ol v in = v ih or v il i ol = 12 ma i ol = 24 ma i ol = 75 ma (note) 3.0 4.5 5.5 D D D D D D 0.36 0.36 D D D D 0.44 0.44 1.65 v input leakage current i in v in = v cc or gnd 5.5 D D 0.1 D 1.0 a quiescent supply current i cc v in = v cc or gnd 5.5 D D 8.0 D 80.0 a note: this spec indicates the capability of driving 50 ? transmission lines. one output should be tested at a ti me for a 10 ms maximum duration.
tc74ac161,163p/f/ft 2012-02-29 7 timing requirements (input: t r = t f = 3 ns) ta = 25c ta = ? 40 to 85c characteristics symbol test condition v cc (v) limit limit unit minimum pulse width (ck) t w (l) t w (h) figure 1 3.3 0.3 5.0 0.5 7.0 5.0 7.0 5.0 ns minimum pulse width ( clr ) (note 1) t w (l) figure 4 3.3 0.3 5.0 0.5 7.0 5.0 7.0 5.0 ns minimum set-up time ( load , enp, ent) t s figure 2, figure 3 3.3 0.3 5.0 0.5 11.0 7.0 13.0 7.0 ns minimum set-up time (a, b, c, d) t s figure 2 3.3 0.3 5.0 0.5 8.0 4.0 8.0 4.0 ns minimum set-up time ( clr ) (note 2) t s figure 5 3.3 0.3 5.0 0.5 6.0 4.0 6.0 4.0 ns minimum hold time t h figure 2, figure 3, figure 5 3.3 0.3 5.0 0.5 1.0 1.0 1.0 1.0 ns minimum removal time ( clr ) (note 1) t rem figure 4 3.3 0.3 5.0 0.5 6.0 4.0 6.0 4.0 ns note 1: for tc74ac161 only note 2: for tc74ac163 only
tc74ac161,163p/f/ft 2012-02-29 8 ac characteristics (c l = 50 pf, r l = 500 ?, input: t r = t f = 3 ns) ta = 25c ta = 40 to 85c characteristics symbol test condition v cc (v) min typ. max min max unit propagation delay time (ck-q) t plh t phl figure 1 3.3 0.3 5.0 0.5 ? ? 8.8 6.5 15.8 9.6 1.0 1.0 18.0 11.0 ns propagation delay time (ck-carry, count mode) t plh t phl figure 1 3.3 0.3 5.0 0.5 ? ? 10.4 8.1 18.4 11.8 1.0 1.0 21.6 13.5 ns propagation delay time (ck-carry, preset mode) t plh t phl figure 2 3.3 0.3 5.0 0.5 ? ? 12.9 9.1 22.4 13.2 1.0 1.0 25.5 15.0 ns propagation delay time (ent-carry) t plh t phl figure 6 3.3 0.3 5.0 0.5 ? ? 7.5 5.8 13.2 8.3 1.0 1.0 15.0 9.5 ns propagation delay time ( clr -q) (note 1) t phl figure 4 3.3 0.3 5.0 0.5 ? ? 10.6 7.7 18.4 11.4 1.0 1.0 21.0 13.0 ns propagation delay time ( clr -carry) (note 1) t phl figure 4 3.3 0.3 5.0 0.5 ? ? 12.0 8.6 21.0 12.7 1.0 1.0 24.0 14.5 ns maximum clock frequency f max ? 3.3 0.3 5.0 0.5 50 90 110 140 ? ? 50 90 ? ? mhz input capacitance c in ? ? 5 10 ? 10 pf power dissipation capacitance c pd (note 2 ? 85 ? ? ? pf note 1: for tc74ac161 only note 2: c pd is defined as the value of the internal equivalent capacitance which is ca lculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd v cc f in + i cc when the outputs drive a capacitive load, total current consumption is the sum of c pd , and ? i cc which is obtained from the following formula: ? ? 1 ? ? 16 c 16 c 8 c 4 c 2 c vf = ?i co qd qc qb qa ccckcc c qa to c qd and c co are the capacitances at qa to qd and carry out, respectively. f ck is the input frequency of the ck.
tc74ac161,163p/f/ft 2012-02-29 9 switching characteris tics test waveform figure 1 count mode figure 4 clear mode (tc74ac161) ck 50% t wh t wl v cc gnd 50% v oh v ol t phl 50% 50% t plh q, carry clr 50% t wl v cc gnd v oh v ol t rem 50% 0.5 v cc t phl ck q, carry v cc gnd figure 2 preset mode figure 5 clear mode (tc74ac163) load 50% t s v cc gnd t h 50% t s t h 50% t s t h 50% a to d t plh , t phl 50% v cc gnd ck v oh v ol q, carry 0.5 v cc clr 50% v cc gnd v oh v ol 50% ck q, carry v cc gnd 50% t s t h enp, ent 50% t s v cc gnd t h 50% t s t h ck q v oh v ol v oh v ol ent v cc gnd v cc gnd 50% 50% 50% 50% carry 0.5 v cc 0.5 v cc t plh t phl figure 3 count enable mode figure 6 cascade mode (fix maximum count)
tc74ac161,163p/f/ft 2012-02-29 10 typical application parallel carry n-bit counter ld a clr qa b c qb qc d qd inputs outputs carry enp ent ck ld a clr qa bc qb qc d qd inputs outputs carry enp ent ck ld a clr qa bc qb qc d qd inputs outputs carry enp ent ck next stage h: count l: disable h: count l: disable ck clr
tc74ac161,163p/f/ft 2012-02-29 11 package dimensions weight: 1.00 g (typ.)
tc74ac161,163p/f/ft 2012-02-29 12 package dimensions weight: 0.18 g (typ.)
tc74ac161,163p/f/ft 2012-02-29 13 package dimensions weight: 0.06 g (typ.)
tc74ac161,163p/f/ft 2012-02-29 14 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproducti on is without alteration/omission. ? though toshiba works continually to improve product's quality a nd reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situat ions in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest ve rsions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and applicat ion notes for product and the precautions and condi tions set forth in the "toshiba se miconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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